As promised, the second part of the update.
For a while now we are working on a new cool project, a cheap logic analyser. The new LPC4300 series from NXP has a very cool and unique peripheral called SGPIO or Serial GPIO. These are a handful IO pins that can be used to easily create extra serial protocols like I2C or SPI. It is possible to do this in software on every microcontroller but it's quite a big CPU load. SGPIO uses a 32 bit buffer per channel to lower this CPU load a lot. This is also a very nice peripheral to make a logic analyser with without using a FPGA. Add the fairly large 264K SRAM on the LPC4300 series and the idea for a logic analyser was born. If you don't know what a logic analyser is this video can explain it quite well.
This is still a project in development and it is not done yet, this is just a post to inform you and see if people would be interested in it.
When done the whole project will be open source. It used the well known and powerful OLS software for the PC and will be compatible with the SUMP protocol. We aim for the following specifications:
96K samples using 16 channels
35 euro price.
If you would be interested in this send us an mail or post a reply on this blog, if there is enough interest we will finish the project ASAP. We also need a cool name, suggestions are very welcome.